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Nov 29, 2024
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2017-2018 Undergraduate Catalog ARCHIVED CATALOG: CONTENT MAY NOT BE CURRENT. USE THE DROP DOWN ABOVE TO ACCESS THE CURRENT CATALOG.
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CpE 200 - Digital Logic Design II
Design of sequential circuits, finite state machines (FSMs) and arithmetic circuits. Timing analysis. Introduction to hardware description language (HDL) Verilog: gate-level, dataflow, and behavioral models. Simple CPU and Assembly language.
Credits 3
Corequisites CpE 200D
Prerequisites CpE 100 with a grade of C or better.
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