Sep 22, 2021  
2013-2014 Graduate Catalog 
    
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ECG 707 - Logic Synthesis Engineering


Credits 3

Theory and application of Boolean Minimization, functional decomposition and logic synthesis for FPGAs, serial and parallel decomposition strategies, and design implementation using FPGAs. Design entry, introduction to VHDL, BDD, FSM, and BLIF. Placement and routing in Xilinx and Aleira.

Prerequisites
Graduate standing in computer engineering or consent of instructor.